Commit d24650ba authored by Kedareswara rao Appana's avatar Kedareswara rao Appana Committed by Naga Sureshkumar Relli
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ethernet: Fix race condition incase of 10G



For 10G MAC based designs there is a possibilty
that mac m_axis_rx interface can be directly connected
to the AXI DMA instead of AXI Stream fifo for this kind of
configuration existing tcl giving compilation error

This patch fixes this issue.
Signed-off-by: default avatarKedareswara rao Appana <appanad@xilinx.com>
Acked-by: default avatarNaga Sureshkumar Relli <nagasure@xilinx.com>
parent abab8802
......@@ -300,7 +300,11 @@ proc get_connectedip {intf} {
set target_ipname [get_property IP_NAME $connected_ip]
if {$target_ipname == "axis_data_fifo"} {
set rxethmem [get_property CONFIG.FIFO_DEPTH $connected_ip]
}
} else {
# In 10G MAC case if the rx_stream interface is not connected to
# a Stream-fifo set the rxethmem value to a default jumbo MTU size
set rxethmem 9600
}
}
set target_ip [is_ethsupported_target $connected_ip]
if { $target_ip == "true"} {
......
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